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lines changed Original file line number Diff line number Diff line change 3030 * Intel Cooper Lake was the only intermediary platform, that supported BF16, but not FP16.
3131 * It's mostly used in 4-socket and 8-socket high-memory configurations.
3232 *
33- * In practical terms , it makes sense to differentiate only 3 AVX512 generations:
33+ * For us , it makes sense to differentiate only these AVX512 generations:
3434 * 1. Intel Skylake (pre 2019): supports single-precision dot-products.
3535 * 2. Intel Ice Lake (2019-2021): advanced integer algorithms.
3636 * 3. AMD Genoa (2023+): brain-floating point support.
3737 * 4. Intel Sapphire Rapids (2023+): advanced mixed-precision float processing.
3838 * 5. AMD Turin (2024+): advanced sparse algorithms.
3939 *
40+ * Beyond those, we support AVX2 for old Haswell generation CPUs, and AVX2+VNNI for modern Sierra generation.
41+ *
4042 * To list all available macros for x86, take a recent compiler, like GCC 12 and run:
4143 * gcc-12 -march=sapphirerapids -dM -E - < /dev/null | egrep "SSE|AVX" | sort
4244 * On Arm machines you may want to check for other flags:
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