[gn] port 29fef3a (bolt PassTests)

Author: nico

llvm/utils/gn/secondary/bolt/unittests/BUILD.gn

@@ -2,6 +2,7 @@ group("unittests") {
   deps = [
     "Core:CoreTests",
     "Profile:ProfileTests",
+    "Passes:PassTests",
   ]
   testonly = true
 }

llvm/utils/gn/secondary/bolt/unittests/Passes/BUILD.gn

@@ -0,0 +1,48 @@
+import("//llvm/lib/Target/targets.gni")
+import("//third-party/unittest/unittest.gni")
+
+unittest("PassTests") {
+  configs += [ "//llvm/utils/gn/build:bolt_code" ]
+  deps = [
+    "//bolt/include/bolt/Core:TargetConfig.def",
+    "//bolt/lib/Core",
+    "//bolt/lib/Passes",
+    "//bolt/lib/Profile",
+    "//bolt/lib/Rewrite",
+    "//bolt/lib/Utils",
+    "//llvm/lib/DebugInfo/DWARF",
+    "//llvm/lib/MC",
+    "//llvm/lib/Object",
+    "//llvm/lib/Target:TargetsToBuild",
+  ]
+  sources = [ "InsertNegateRAState.cpp" ]
+
+  defines = []
+  include_dirs = []
+  if (llvm_build_AArch64) {
+    defines += [ "AARCH64_AVAILABLE" ]
+
+    # This target reaches into the internal headers of LLVM's AArch64 library.
+    # That target doesn't expect that, so it doesn't use public_deps for
+    # tblgen-generated headers used only in internal headers (...which this
+    # target here questionably includes). So depend on the target that generates
+    # those headers here.
+    include_dirs += [ "//llvm/lib/Target/AArch64" ]
+    deps += [
+      "//llvm/lib/Target/AArch64:AArch64GenSDNodeInfo",
+      "//llvm/lib/Target/AArch64/MCTargetDesc",
+      "//llvm/lib/Target/AArch64/Utils",
+    ]
+  }
+  if (llvm_build_X86) {
+    defines += [ "X86_AVAILABLE" ]
+
+    # This target reaches into the internal headers of LLVM's X86 library.
+    # That target doesn't expect that, so it doesn't use public_deps for
+    # tblgen-generated headers used only in internal headers (...which this
+    # target here questionably includes). So depend on the target that generates
+    # those headers here.
+    include_dirs += [ "//llvm/lib/Target/X86" ]
+    deps += [ "//llvm/lib/Target/X86/MCTargetDesc" ]
+  }
+}

llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

@@ -76,6 +76,7 @@ tablegen("AArch64GenSDNodeInfo") {
   visibility = [
     ":LLVMAArch64CodeGen",
     "//bolt/unittests/Core:CoreTests",
+    "//bolt/unittests/Passes:PassTests",
     "//llvm/unittests/Target/AArch64:AArch64Tests",
   ]
   args = [ "-gen-sd-node-info" ]