[FEAT] FYI: with GCC 14.x ... sabctools uses RVV (= RISC-V "V" Vector Extension)

[sanderjo]

Is this a new feature request?

• I have searched the existing issues

Wanted change

sabctools uses SIMD. Which works on X86 and ARM. And if you use gcc 14, also on RISC-V

So this is a FYI. And thus as soon as LSIO's sabnzbd is available on RISC-V, and it uses a recent Alpine (so with GCC 14) ... RVV speeds!

$ sudo docker run -it alpine:latest /bin/sh


apk add py3-pip g++ python3-dev
pip install sabctools --break-system-packages
python3 -c "import sabctools; print(sabctools.simd)"


/ # python3 -c "import sabctools; print(sabctools.simd)"
RVV

/ # uname -a
Linux 9b110e87f0d3 6.6.63 #2.1.0.2 SMP PREEMPT Fri Jan 24 03:39:48 UTC 2025 riscv64 Linux

/ # g++ --version
g++ (Alpine 14.2.0) 14.2.0
Copyright (C) 2024 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Reason for change

more speed based on SIMD -> RVV

Proposed code change

Hmmm. Release LSIO's SABnzbd for RISC-V based on recent Alpine

[aptalca]

We don't publish risc-v images as all of our images are built on native hardware and we don't have any risc-v builders.

[sanderjo]

We don't publish risc-v images as all of our images are built on native hardware and we don't have any risc-v builders.

I know. But I'm still hoping. ;-) And thus just a FYI.

FWIW: https://github.com/alpinelinux/docker-alpine has a riscv64 image. So probably built on github (and not on native hardware)?

Thank you for all your work: I love lsio's sabnzbd (on x86 and arm)

[thespad]

Alpine have access to native RISCV hardware. Lots of our images won't build/run via qemu, which is one of the reasons we only build native.

If/when any of us get hold of some RISCV hardware we'll reconsider.

[sanderjo]

If/when any of us get hold of some RISCV hardware we'll reconsider.

What OS would you need?

https://wiki.banana-pi.org/Banana_Pi_BPI-F3#Linux mentions:

Bianbu (I run this: very polished, based on Ubuntu)
Debian
Armbian
Fedora

[Roxedus]

anything that runs docker, as we have containerized our build env

[sanderjo]

If I donate the money for the Bananapi BFI-F3 via https://opencollective.com/linuxserver/donate/ ... would that help?

[aptalca]

Funding is not the issue. Hosting is.

We used to have team members host builders for the group, but that caused various issues. It was prone to downtime as well as bandwidth limitations due to team members' residential net connections.

We moved away from that and our current infra is a lot more stable as it is spread across Hetzner, Contabo, DO, OCI and AWS.

If there is a cloud provider that has Risc-v devices available at a reasonable rate, that would certainly be considered.

[sanderjo]

If there is a cloud provider that has Risc-v devices available at a reasonable rate, that would certainly be considered.

There is: https://labs.scaleway.com/en/em-rv1/ 0,042 € per hour (running, or image is there) or 15,99 € per month.

But ... no risc-v vector (RVV) 1.0 on that older SoC T-Head 1520 CPU (C910) RV64GC (no "V" in that name), so DTO (defeating the objective) for me personally. :-(

EDIT:

Ah, good news: I've got an old RISC-V SBC without RVV, and with Ubuntu 25.04 & gcc 14.2, the generated binary has RVV code in it. So the CPU does not need to have RVV to generate RVV code. So that means the Scaleway RISC-V would be usable to generate RISC-V code, including RVV ... as long as gcc 14.2 is used (inside docker for example).

sander@lichee:~$ lsb_release -a
No LSB modules are available.
Distributor ID:	Ubuntu
Description:	Ubuntu 25.04
Release:	25.04
Codename:	plucky

sander@lichee:~$ gcc --version
gcc (Ubuntu 14.2.0-19ubuntu2) 14.2.0
Copyright (C) 2024 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

With this c code:

#include <stdio.h>

void saxpy(float a, float *restrict x, float *restrict y, long count)
{
long i;
x = __builtin_assume_aligned(x, 16);
y = __builtin_assume_aligned(y, 16);

for (i = 0; i < count; i++) {
y[i] = y[i] + a * x[i];
}
}

void main(){
printf("hallo!\n");
}

$ gcc  -O3 -march=rv64gcv_zvl256b  hallo-rvv.c -o hallo-rvv 
$ objdump -d hallo-rvv | awk '{ print $3 }'  | sort -u | grep -E "^v"
vfmacc.vv
vfmv.v.f
vle32.v
vse32.v
vsetvli

And sabctools (which uses RVV), just installed via sudo apt install pythons3-sabctools has RVV in it:

$ objdump -d /usr/lib/python3/dist-packages/sabctools/sabctools.cpython-313-riscv64-linux-gnu.so  | awk '{ print $3 }'  | sort -u | grep -E "^v" | head -10
vadd.vi
vadd.vv
vcompress.vm
vcpop.m
viota.m
vle8.v
vmadc.vi
vmadc.vv
vmand.mm
vmandn.mm

[thespad]

I'm playing with a Scaleway RISCV instance with some free credits I have, but don't expect anything any time soon, because our build pipelines aren't designed to RISCV so would need an overhaul. Plus those Scaleway boxes are 100Mbit NICs and 128Mb MMC disk, so not exactly powerhouses.

[thespad]

Give this a go ghcr.io/linuxserver/lspipepr-sabnzbd:riscv64-nightly

I hope it works because it took 1.5 hours to compile all the python packages :P

[sanderjo]

Thank you!

I'll do ... as soon as I'm close to my RISC-V-machines (now remote).

I hope it works because it took 1.5 hours to compile all the python packages

On RISC-V hardware? Or emulated?