Move Arcilator pipeline into separate library.

Allow re-use of the arcilator library. Split up the large pipeline into
finer grained stages and move into its own library.

populateHwModuleToArcPipeline is split into:
 - arcPreprocessingPipeline
 - arcConversionPipeline
 - arcOptimizationPipeline
 - arcStateLoweringPipeline and
 - arcStateAllocationPipeline

Flags to customize passes are moved from the binary into the
corresponding pipeline options.

Author: SimonEbner

tools/arcilator/CMakeLists.txt

@@ -37,12 +37,13 @@ set(libs
   MLIRTargetLLVMIRExport
 )
 
-add_circt_tool(arcilator arcilator.cpp DEPENDS ${libs})
+add_circt_tool(arcilator arcilator.cpp pipelines.h pipelines.cpp DEPENDS ${libs})
 target_link_libraries(arcilator
   PRIVATE
   ${libs}
   ${ARCILATOR_JIT_DEPS}
 )
+target_include_directories(arcilator PRIVATE ${CMAKE_CURRENT_SOURCE_DIR})
 
 llvm_update_compile_flags(arcilator)
 mlir_check_all_link_libraries(arcilator)

tools/arcilator/arcilator.cpp

@@ -11,11 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "circt/Conversion/ArcToLLVM.h"
-#include "circt/Conversion/CombToArith.h"
-#include "circt/Conversion/ConvertToArcs.h"
 #include "circt/Conversion/Passes.h"
-#include "circt/Conversion/SeqToSV.h"
 #include "circt/Dialect/Arc/ArcDialect.h"
 #include "circt/Dialect/Arc/ArcInterfaces.h"
 #include "circt/Dialect/Arc/ArcOps.h"
@@ -24,15 +20,10 @@
 #include "circt/Dialect/Arc/ModelInfoExport.h"
 #include "circt/Dialect/Comb/CombDialect.h"
 #include "circt/Dialect/Emit/EmitDialect.h"
-#include "circt/Dialect/Emit/EmitPasses.h"
-#include "circt/Dialect/HW/HWPasses.h"
 #include "circt/Dialect/LLHD/IR/LLHDDialect.h"
 #include "circt/Dialect/OM/OMDialect.h"
-#include "circt/Dialect/OM/OMPasses.h"
 #include "circt/Dialect/SV/SVDialect.h"
-#include "circt/Dialect/Seq/SeqPasses.h"
 #include "circt/Dialect/Sim/SimDialect.h"
-#include "circt/Dialect/Sim/SimPasses.h"
 #include "circt/Dialect/Verif/VerifDialect.h"
 #include "circt/Support/Passes.h"
 #include "circt/Support/Version.h"
@@ -64,6 +55,7 @@
 #include "mlir/Target/LLVMIR/Export.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 #include "mlir/Transforms/Passes.h"
+#include "pipelines.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Module.h"
 #include "llvm/Support/CommandLine.h"
@@ -96,59 +88,12 @@ static llvm::cl::opt<std::string>
                    llvm::cl::value_desc("filename"), llvm::cl::init("-"),
                    llvm::cl::cat(mainCategory));
 
-static llvm::cl::opt<bool>
-    observePorts("observe-ports", llvm::cl::desc("Make all ports observable"),
-                 llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool>
-    observeWires("observe-wires", llvm::cl::desc("Make all wires observable"),
-                 llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool> observeNamedValues(
-    "observe-named-values",
-    llvm::cl::desc("Make values with `sv.namehint` observable"),
-    llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool>
-    observeRegisters("observe-registers",
-                     llvm::cl::desc("Make all registers observable"),
-                     llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool>
-    observeMemories("observe-memories",
-                    llvm::cl::desc("Make all memory contents observable"),
-                    llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
 static llvm::cl::opt<std::string> stateFile("state-file",
                                             llvm::cl::desc("State file"),
                                             llvm::cl::value_desc("filename"),
                                             llvm::cl::init(""),
                                             llvm::cl::cat(mainCategory));
 
-static llvm::cl::opt<bool> shouldInline("inline", llvm::cl::desc("Inline arcs"),
-                                        llvm::cl::init(true),
-                                        llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool> shouldDedup("dedup",
-                                       llvm::cl::desc("Deduplicate arcs"),
-                                       llvm::cl::init(true),
-                                       llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool> shouldDetectEnables(
-    "detect-enables",
-    llvm::cl::desc("Infer enable conditions for states to avoid computation"),
-    llvm::cl::init(true), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool> shouldDetectResets(
-    "detect-resets",
-    llvm::cl::desc("Infer reset conditions for states to avoid computation"),
-    llvm::cl::init(false), llvm::cl::cat(mainCategory));
-
-static llvm::cl::opt<bool>
-    shouldMakeLUTs("lookup-tables",
-                   llvm::cl::desc("Optimize arcs into lookup tables"),
-                   llvm::cl::init(true), llvm::cl::cat(mainCategory));
-
 static llvm::cl::opt<bool>
     printDebugInfo("print-debug-info",
                    llvm::cl::desc("Print debug information"),
@@ -176,12 +121,6 @@ static llvm::cl::opt<bool> splitInputFile(
                    "chunk independently"),
     llvm::cl::init(false), llvm::cl::Hidden, llvm::cl::cat(mainCategory));
 
-static llvm::cl::opt<unsigned> splitFuncsThreshold(
-    "split-funcs-threshold",
-    llvm::cl::desc(
-        "Split large MLIR functions that occur above the given size threshold"),
-    llvm::cl::ValueOptional, llvm::cl::cat(mainCategory));
-
 // Options to control early-out from pipeline.
 enum Until {
   UntilPreprocessing,
@@ -250,105 +189,28 @@ static void populateHwModuleToArcPipeline(PassManager &pm) {
   // represented as intrinsic ops.
   if (untilReached(UntilPreprocessing))
     return;
-  pm.addPass(om::createStripOMPass());
-  pm.addPass(emit::createStripEmitPass());
-  pm.addPass(createLowerFirMemPass());
-  pm.addPass(createLowerVerifSimulationsPass());
-  {
-    arc::AddTapsOptions opts;
-    opts.tapPorts = observePorts;
-    opts.tapWires = observeWires;
-    opts.tapNamedValues = observeNamedValues;
-    pm.addPass(arc::createAddTapsPass(opts));
-  }
-  pm.addPass(arc::createStripSVPass());
-  {
-    arc::InferMemoriesOptions opts;
-    opts.tapPorts = observePorts;
-    opts.tapMemories = observeMemories;
-    pm.addPass(arc::createInferMemoriesPass(opts));
-  }
-  pm.addPass(sim::createLowerDPIFunc());
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
+  arcPreprocessingPipeline(pm);
 
   // Restructure the input from a `hw.module` hierarchy to a collection of arcs.
   if (untilReached(UntilArcConversion))
     return;
-  {
-    ConvertToArcsPassOptions opts;
-    opts.tapRegisters = observeRegisters;
-    pm.addPass(createConvertToArcsPass(opts));
-  }
-  if (shouldDedup)
-    pm.addPass(arc::createDedupPass());
-  pm.addPass(hw::createFlattenModules());
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
+  arcConversionPipeline(pm);
 
   // Perform arc-level optimizations that are not specific to software
   // simulation.
   if (untilReached(UntilArcOpt))
     return;
-  pm.addPass(arc::createSplitLoopsPass());
-  if (shouldDedup)
-    pm.addPass(arc::createDedupPass());
-  {
-    arc::InferStatePropertiesOptions opts;
-    opts.detectEnables = shouldDetectEnables;
-    opts.detectResets = shouldDetectResets;
-    pm.addPass(arc::createInferStateProperties(opts));
-  }
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
-  pm.addNestedPass<hw::HWModuleOp>(arc::createMergeTaps());
-  if (shouldMakeLUTs)
-    pm.addPass(arc::createMakeTablesPass());
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
-
-  // Now some arguments may be unused because reset conditions are not passed as
-  // inputs anymore pm.addPass(arc::createRemoveUnusedArcArgumentsPass());
-  // Because we replace a lot of StateOp inputs with constants in the enable
-  // patterns we may be able to sink a lot of them
-  // TODO: maybe merge RemoveUnusedArcArguments with SinkInputs?
-  // pm.addPass(arc::createSinkInputsPass());
-  // pm.addPass(createCSEPass());
-  // pm.addPass(createSimpleCanonicalizerPass());
-  // Removing some muxes etc. may lead to additional dedup opportunities
-  // if (shouldDedup)
-  // pm.addPass(arc::createDedupPass());
+  arcOptimizationPipeline(pm);
 
   // Lower stateful arcs into explicit state reads and writes.
   if (untilReached(UntilStateLowering))
     return;
-  pm.addPass(arc::createLowerStatePass());
-
-  // TODO: LowerClocksToFuncsPass might not properly consider scf.if operations
-  // (or nested regions in general) and thus errors out when muxes are also
-  // converted in the hw.module or arc.model
-  // TODO: InlineArcs seems to not properly handle scf.if operations, thus the
-  // following is commented out
-  // pm.addPass(arc::createMuxToControlFlowPass());
-  if (shouldInline)
-    pm.addPass(arc::createInlineArcsPass());
-
-  pm.addPass(arc::createMergeIfsPass());
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
+  arcStateLoweringPipeline(pm);
 
   // Allocate states.
   if (untilReached(UntilStateAlloc))
     return;
-  pm.addPass(arc::createLowerArcsToFuncsPass());
-  pm.nest<arc::ModelOp>().addPass(arc::createAllocateStatePass());
-  pm.addPass(arc::createLowerClocksToFuncsPass()); // no CSE between state alloc
-                                                   // and clock func lowering
-  if (splitFuncsThreshold.getNumOccurrences()) {
-    pm.addPass(arc::createSplitFuncs({splitFuncsThreshold}));
-  }
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
+  arcStateAllocationPipeline(pm);
 }
 
 /// Populate a pass manager with the Arc to LLVM pipeline for the given
@@ -357,9 +219,7 @@ static void populateArcToLLVMPipeline(PassManager &pm) {
   // Lower the arcs and update functions to LLVM.
   if (untilReached(UntilLLVMLowering))
     return;
-  pm.addPass(createLowerArcToLLVMPass());
-  pm.addPass(createCSEPass());
-  pm.addPass(arc::createArcCanonicalizerPass());
+  arcToLLVMPipeline(pm);
 }
 
 static LogicalResult processBuffer(
@@ -379,6 +239,7 @@ static LogicalResult processBuffer(
   pmArc.enableTiming(ts);
   if (failed(applyPassManagerCLOptions(pmArc)))
     return failure();
+
   populateHwModuleToArcPipeline(pmArc);
 
   if (failed(pmArc.run(module.get())))

tools/arcilator/pipelines.cpp

@@ -0,0 +1,130 @@
+#include "pipelines.h"
+
+#include "circt/Conversion/ArcToLLVM.h"
+#include "circt/Conversion/CombToArith.h"
+#include "circt/Conversion/ConvertToArcs.h"
+#include "circt/Conversion/Passes.h"
+#include "circt/Conversion/SeqToSV.h"
+#include "circt/Dialect/Arc/ArcOps.h"
+#include "circt/Dialect/Arc/ArcPasses.h"
+#include "circt/Dialect/Emit/EmitPasses.h"
+#include "circt/Dialect/HW/HWPasses.h"
+#include "circt/Dialect/OM/OMPasses.h"
+#include "circt/Dialect/Seq/SeqPasses.h"
+#include "circt/Dialect/Sim/SimPasses.h"
+#include "circt/Support/Passes.h"
+#include "mlir/Transforms/Passes.h"
+
+using namespace mlir;
+using namespace circt;
+using namespace arc;
+
+void circt::arcPreprocessingPipeline(PassManager &pm,
+                                     const ArcPreprocessingOptions &options) {
+  pm.addPass(om::createStripOMPass());
+  pm.addPass(emit::createStripEmitPass());
+  pm.addPass(createLowerFirMemPass());
+  pm.addPass(createLowerVerifSimulationsPass());
+  {
+    arc::AddTapsOptions opts;
+    opts.tapPorts = options.observePorts;
+    opts.tapWires = options.observeWires;
+    opts.tapNamedValues = options.observeNamedValues;
+    pm.addPass(arc::createAddTapsPass(opts));
+  }
+  pm.addPass(arc::createStripSVPass());
+  {
+    arc::InferMemoriesOptions opts;
+    opts.tapPorts = options.observePorts;
+    opts.tapMemories = options.observeMemories;
+    pm.addPass(arc::createInferMemoriesPass(opts));
+  }
+  pm.addPass(sim::createLowerDPIFunc());
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+}
+
+void circt::arcConversionPipeline(PassManager &pm,
+                                  const ArcConversionOptions &options) {
+  {
+    ConvertToArcsPassOptions opts;
+    opts.tapRegisters = options.observeRegisters;
+    pm.addPass(createConvertToArcsPass(opts));
+  }
+  if (options.shouldDedup)
+    pm.addPass(arc::createDedupPass());
+  pm.addPass(hw::createFlattenModules());
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+}
+
+void circt::arcOptimizationPipeline(PassManager &pm,
+                                    const ArcOptimizationOptions &options) {
+  // Perform arc-level optimizations that are not specific to software
+  // simulation.
+  pm.addPass(arc::createSplitLoopsPass());
+  if (options.shouldDedup)
+    pm.addPass(arc::createDedupPass());
+  {
+    arc::InferStatePropertiesOptions opts;
+    opts.detectEnables = options.shouldDetectEnables;
+    opts.detectResets = options.shouldDetectResets;
+    pm.addPass(arc::createInferStateProperties(opts));
+  }
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+  pm.addNestedPass<hw::HWModuleOp>(arc::createMergeTaps());
+  if (options.shouldMakeLUTs)
+    pm.addPass(arc::createMakeTablesPass());
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+
+  // Now some arguments may be unused because reset conditions are not passed as
+  // inputs anymore pm.addPass(arc::createRemoveUnusedArcArgumentsPass());
+  // Because we replace a lot of StateOp inputs with constants in the enable
+  // patterns we may be able to sink a lot of them
+  // TODO: maybe merge RemoveUnusedArcArguments with SinkInputs?
+  // pm.addPass(arc::createSinkInputsPass());
+  // pm.addPass(createCSEPass());
+  // pm.addPass(createSimpleCanonicalizerPass());
+  // Removing some muxes etc. may lead to additional dedup opportunities
+  // if (options.shouldDedup)
+  // pm.addPass(arc::createDedupPass());
+}
+
+void circt::arcStateLoweringPipeline(PassManager &pm,
+                                     const ArcStateLoweringOptions &options) {
+  pm.addPass(arc::createLowerStatePass());
+
+  // TODO: LowerClocksToFuncsPass might not properly consider scf.if operations
+  // (or nested regions in general) and thus errors out when muxes are also
+  // converted in the hw.module or arc.model
+  // TODO: InlineArcs seems to not properly handle scf.if operations, thus the
+  // following is commented out
+  // pm.addPass(arc::createMuxToControlFlowPass());
+  if (options.shouldInline)
+    pm.addPass(arc::createInlineArcsPass());
+
+  pm.addPass(arc::createMergeIfsPass());
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+}
+
+void circt::arcStateAllocationPipeline(
+    PassManager &pm, const ArcStateAllocationOptions &options) {
+  pm.addPass(arc::createLowerArcsToFuncsPass());
+  pm.nest<arc::ModelOp>().addPass(arc::createAllocateStatePass());
+  pm.addPass(arc::createLowerClocksToFuncsPass()); // no CSE between state alloc
+                                                   // and clock func lowering
+  if (options.splitFuncsThreshold.getNumOccurrences()) {
+    pm.addPass(arc::createSplitFuncs({options.splitFuncsThreshold}));
+  }
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+}
+
+void circt::arcToLLVMPipeline(PassManager &pm) {
+  pm.addPass(createLowerArcToLLVMPass());
+  pm.addPass(createCSEPass());
+  pm.addPass(arc::createArcCanonicalizerPass());
+}