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[M68k] add test showing callseq begin failure for doubles, and fix mem chain generation
1 parent f42e58f commit c513a96

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4 files changed

+160
-109
lines changed

4 files changed

+160
-109
lines changed

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -507,7 +507,8 @@ FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest,
507507
BestMaxNest = MyMaxNest;
508508
}
509509
}
510-
assert(Best);
510+
if (!Best)
511+
return nullptr;
511512
MaxNest = BestMaxNest;
512513
return Best;
513514
}
@@ -584,7 +585,8 @@ void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) {
584585
unsigned NestLevel = 0;
585586
unsigned MaxNest = 0;
586587
SDNode *N = FindCallSeqStart(Node, NestLevel, MaxNest, TII);
587-
assert(N && "Must find call sequence start");
588+
if (!N)
589+
break;
588590

589591
SUnit *Def = &SUnits[N->getNodeId()];
590592
CallSeqEndForStart[Def] = SU;

llvm/lib/Target/M68k/M68kISelLowering.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -633,7 +633,6 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
633633
Chain = EmitTailCallLoadRetAddr(DAG, RetFI, Chain, IsTailCall, FPDiff, DL);
634634

635635
SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
636-
SmallVector<SDValue, 8> MemOpChains;
637636
SDValue StackPtr;
638637

639638
// Walk the register/memloc assignments, inserting copies/loads. In the case
@@ -689,14 +688,10 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
689688
StackPtr = DAG.getCopyFromReg(Chain, DL, RegInfo->getStackRegister(),
690689
getPointerTy(DAG.getDataLayout()));
691690
}
692-
MemOpChains.push_back(
693-
LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags));
691+
Chain = LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags);
694692
}
695693
}
696694

697-
if (!MemOpChains.empty())
698-
Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
699-
700695
// FIXME Make sure PIC style GOT works as expected
701696
// The only time GOT is really needed is for Medium-PIC static data
702697
// otherwise we are happy with pc-rel or static references

llvm/lib/Target/M68k/M68kInstrArithmetic.td

Lines changed: 101 additions & 101 deletions
Original file line numberDiff line numberDiff line change
@@ -1004,105 +1004,105 @@ defm : BitwisePat<"XOR", xor>;
10041004
// Floating point arithmetic instruction
10051005
//===----------------------------------------------------------------------===//
10061006

1007-
let Defs = [FPS] in
1008-
class MxFArithBase_FF<dag outs, dag ins, string asm, string rounding,
1009-
list<dag> patterns>
1010-
: MxInst<outs, ins, asm, patterns> {
1011-
let Uses = !if(!eq(rounding, ""), [FPC], []);
1012-
1013-
let Predicates = !if(!eq(rounding, ""), [AtLeastM68881], [AtLeastM68040]);
1014-
}
1015-
1016-
class MxFPOpModeSelector<string rounding, bits<7> single, bits<7> double,
1017-
bits<7> extended> {
1018-
bits<7> Mode = !cond(!eq(rounding, "s"): single,
1019-
!eq(rounding, "d"): double,
1020-
!eq(rounding, ""): extended);
1021-
}
1022-
1023-
//===----------------------------------------------------------------------===//
1024-
// Unary floating point instruction
1025-
//===----------------------------------------------------------------------===//
1026-
1027-
class MxFUnary_FF<MxOpBundle Opnd, string rounding,
1028-
string mnemonic, bits<7> opmode>
1029-
: MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src),
1030-
"f"#rounding#mnemonic#".x\t$src, $dst", rounding, [(null_frag)]> {
1031-
let Inst = (ascend
1032-
(descend 0b1111,
1033-
/*COPROCESSOR ID*/0b001,
1034-
0b000,
1035-
/*MODE+REGISTER*/0b000000),
1036-
(descend 0b0, /* R/M */ 0b0, 0b0,
1037-
/*SOURCE SPECIFIER*/
1038-
(operand "$src", 3),
1039-
/*DESTINATION*/
1040-
(operand "$dst", 3),
1041-
/*OPMODE*/
1042-
opmode)
1043-
);
1044-
}
1045-
1046-
multiclass MxFUnaryOp<string mnemonic, bits<7> single, bits<7> double,
1047-
bits<7> extended> {
1048-
foreach rounding = ["", "s", "d"] in {
1049-
defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
1050-
1051-
def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
1052-
: MxFUnary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
1007+
// let Defs = [FPS] in
1008+
// class MxFArithBase_FF<dag outs, dag ins, string asm, string rounding,
1009+
// list<dag> patterns>
1010+
// : MxInst<outs, ins, asm, patterns> {
1011+
// let Uses = !if(!eq(rounding, ""), [FPC], []);
1012+
1013+
// let Predicates = !if(!eq(rounding, ""), [AtLeastM68881], [AtLeastM68040]);
1014+
// }
1015+
1016+
// class MxFPOpModeSelector<string rounding, bits<7> single, bits<7> double,
1017+
// bits<7> extended> {
1018+
// bits<7> Mode = !cond(!eq(rounding, "s"): single,
1019+
// !eq(rounding, "d"): double,
1020+
// !eq(rounding, ""): extended);
1021+
// }
1022+
1023+
// //===----------------------------------------------------------------------===//
1024+
// // Unary floating point instruction
1025+
// //===----------------------------------------------------------------------===//
1026+
1027+
// class MxFUnary_FF<MxOpBundle Opnd, string rounding,
1028+
// string mnemonic, bits<7> opmode>
1029+
// : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src),
1030+
// "f"#rounding#mnemonic#".x\t$src, $dst", rounding, [(null_frag)]> {
1031+
// let Inst = (ascend
1032+
// (descend 0b1111,
1033+
// /*COPROCESSOR ID*/0b001,
1034+
// 0b000,
1035+
// /*MODE+REGISTER*/0b000000),
1036+
// (descend 0b0, /* R/M */ 0b0, 0b0,
1037+
// /*SOURCE SPECIFIER*/
1038+
// (operand "$src", 3),
1039+
// /*DESTINATION*/
1040+
// (operand "$dst", 3),
1041+
// /*OPMODE*/
1042+
// opmode)
1043+
// );
1044+
// }
1045+
1046+
// multiclass MxFUnaryOp<string mnemonic, bits<7> single, bits<7> double,
1047+
// bits<7> extended> {
1048+
// foreach rounding = ["", "s", "d"] in {
1049+
// defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
1050+
1051+
// def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
1052+
// : MxFUnary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
10531053

1054-
let isCodeGenOnly = 1 in
1055-
foreach size = [32, 64] in
1056-
def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
1057-
: MxFUnary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
1058-
rounding, mnemonic, opmode>;
1059-
}
1060-
}
1061-
1062-
defm FABS : MxFUnaryOp<"abs", 0b1011000, 0b1011100, 0b0011000>;
1063-
defm FNEG : MxFUnaryOp<"neg", 0b1011010, 0b1011110, 0b0011010>;
1064-
1065-
//===----------------------------------------------------------------------===//
1066-
// Binary floating point instruction
1067-
//===----------------------------------------------------------------------===//
1068-
1069-
let Constraints = "$src = $dst" in
1070-
class MxFBinary_FF<MxOpBundle Opnd, string rounding,
1071-
string mnemonic, bits<7> opmode>
1072-
: MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src, Opnd.Op:$opd),
1073-
"f"#rounding#mnemonic#".x\t$opd, $dst", rounding, [(null_frag)]> {
1074-
let Inst = (ascend
1075-
(descend 0b1111,
1076-
/*COPROCESSOR ID*/0b001,
1077-
0b000,
1078-
/*MODE+REGISTER*/0b000000),
1079-
(descend 0b0, /* R/M */ 0b0, 0b0,
1080-
/*SOURCE SPECIFIER*/
1081-
(operand "$opd", 3),
1082-
/*DESTINATION*/
1083-
(operand "$dst", 3),
1084-
/*OPMODE*/
1085-
opmode)
1086-
);
1087-
}
1088-
1089-
multiclass MxFBinaryOp<string mnemonic, bits<7> single, bits<7> double,
1090-
bits<7> extended> {
1091-
foreach rounding = ["", "s", "d"] in {
1092-
defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
1093-
1094-
def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
1095-
: MxFBinary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
1096-
1097-
let isCodeGenOnly = 1 in
1098-
foreach size = [32, 64] in
1099-
def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
1100-
: MxFBinary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
1101-
rounding, mnemonic, opmode>;
1102-
}
1103-
}
1104-
1105-
defm FADD : MxFBinaryOp<"add", 0b1100010, 0b1100110, 0b0100010>;
1106-
defm FSUB : MxFBinaryOp<"sub", 0b1101000, 0b1101100, 0b0101000>;
1107-
defm FMUL : MxFBinaryOp<"mul", 0b1100011, 0b1100111, 0b0100011>;
1108-
defm FDIV : MxFBinaryOp<"div", 0b1100000, 0b1100100, 0b0100000>;
1054+
// let isCodeGenOnly = 1 in
1055+
// foreach size = [32, 64] in
1056+
// def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
1057+
// : MxFUnary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
1058+
// rounding, mnemonic, opmode>;
1059+
// }
1060+
// }
1061+
1062+
// defm FABS : MxFUnaryOp<"abs", 0b1011000, 0b1011100, 0b0011000>;
1063+
// defm FNEG : MxFUnaryOp<"neg", 0b1011010, 0b1011110, 0b0011010>;
1064+
1065+
// //===----------------------------------------------------------------------===//
1066+
// // Binary floating point instruction
1067+
// //===----------------------------------------------------------------------===//
1068+
1069+
// let Constraints = "$src = $dst" in
1070+
// class MxFBinary_FF<MxOpBundle Opnd, string rounding,
1071+
// string mnemonic, bits<7> opmode>
1072+
// : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src, Opnd.Op:$opd),
1073+
// "f"#rounding#mnemonic#".x\t$opd, $dst", rounding, [(null_frag)]> {
1074+
// let Inst = (ascend
1075+
// (descend 0b1111,
1076+
// /*COPROCESSOR ID*/0b001,
1077+
// 0b000,
1078+
// /*MODE+REGISTER*/0b000000),
1079+
// (descend 0b0, /* R/M */ 0b0, 0b0,
1080+
// /*SOURCE SPECIFIER*/
1081+
// (operand "$opd", 3),
1082+
// /*DESTINATION*/
1083+
// (operand "$dst", 3),
1084+
// /*OPMODE*/
1085+
// opmode)
1086+
// );
1087+
// }
1088+
1089+
// multiclass MxFBinaryOp<string mnemonic, bits<7> single, bits<7> double,
1090+
// bits<7> extended> {
1091+
// foreach rounding = ["", "s", "d"] in {
1092+
// defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
1093+
1094+
// def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
1095+
// : MxFBinary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
1096+
1097+
// let isCodeGenOnly = 1 in
1098+
// foreach size = [32, 64] in
1099+
// def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
1100+
// : MxFBinary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
1101+
// rounding, mnemonic, opmode>;
1102+
// }
1103+
// }
1104+
1105+
// defm FADD : MxFBinaryOp<"add", 0b1100010, 0b1100110, 0b0100010>;
1106+
// defm FSUB : MxFBinaryOp<"sub", 0b1101000, 0b1101100, 0b0101000>;
1107+
// defm FMUL : MxFBinaryOp<"mul", 0b1100011, 0b1100111, 0b0100011>;
1108+
// defm FDIV : MxFBinaryOp<"div", 0b1100000, 0b1100100, 0b0100000>;
Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc < %s -mtriple=m68k-linux | FileCheck %s
3+
4+
declare float @float_arg(float)
5+
declare float @double_arg(double)
6+
7+
define float @float_arg_test(ptr %inout) nounwind {
8+
; CHECK-LABEL: float_arg_test:
9+
; CHECK: ; %bb.0: ; %start
10+
; CHECK-NEXT: suba.l #12, %sp
11+
; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
12+
; CHECK-NEXT: move.l #0, (%sp)
13+
; CHECK-NEXT: jsr float_arg
14+
; CHECK-NEXT: move.l (16,%sp), %a2
15+
; CHECK-NEXT: move.l (%a2), (%sp)
16+
; CHECK-NEXT: move.l #0, (4,%sp)
17+
; CHECK-NEXT: jsr __mulsf3
18+
; CHECK-NEXT: move.l %d0, (%a2)
19+
; CHECK-NEXT: moveq #0, %d0
20+
; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
21+
; CHECK-NEXT: adda.l #12, %sp
22+
; CHECK-NEXT: rts
23+
start:
24+
%_58 = call float @float_arg(float 0.000000e+00)
25+
%_60 = load float, ptr %inout, align 8
26+
%_57 = fmul float 0.000000e+00, %_60
27+
store float %_57, ptr %inout, align 8
28+
ret float 0.000000e+00
29+
}
30+
31+
define float @double_arg_test(ptr %inout) nounwind {
32+
; CHECK-LABEL: double_arg_test:
33+
; CHECK: ; %bb.0: ; %start
34+
; CHECK-NEXT: suba.l #12, %sp
35+
; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
36+
; CHECK-NEXT: move.l #0, (4,%sp)
37+
; CHECK-NEXT: move.l #0, (%sp)
38+
; CHECK-NEXT: jsr double_arg
39+
; CHECK-NEXT: move.l (16,%sp), %a2
40+
; CHECK-NEXT: move.l (%a2), (%sp)
41+
; CHECK-NEXT: move.l #0, (4,%sp)
42+
; CHECK-NEXT: jsr __mulsf3
43+
; CHECK-NEXT: move.l %d0, (%a2)
44+
; CHECK-NEXT: moveq #0, %d0
45+
; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
46+
; CHECK-NEXT: adda.l #12, %sp
47+
; CHECK-NEXT: rts
48+
start:
49+
%_58 = call float @double_arg(double 0.000000e+00)
50+
%_60 = load float, ptr %inout, align 8
51+
%_57 = fmul float 0.000000e+00, %_60
52+
store float %_57, ptr %inout, align 8
53+
ret float 0.000000e+00
54+
}

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