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[X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP #169947

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@e-kud e-kud commented Nov 28, 2025

Due to untested branch in #119335

Fixes #167326

@e-kud e-kud requested review from RKSimon, arsenm and topperc November 28, 2025 17:56
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llvmbot commented Nov 28, 2025

@llvm/pr-subscribers-llvm-globalisel

Author: Evgenii Kudriashov (e-kud)

Changes

Due to untested branch in #119335

Fixes #167326

Full diff: https://github.com/llvm/llvm-project/pull/169947.diff

3 Files Affected:

  • (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+1-1)
  • (modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+1)
  • (modified) llvm/test/CodeGen/X86/isel-icmp.ll (+172-6)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 120c38ab8404c..5eb100fb5348b 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -1930,7 +1930,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
         Register CmpOut;
         CmpInst::Predicate PartPred;
 
-        if (I == E - 1 && LHSLeftoverRegs.empty()) {
+        if (I == E - 1) {
           PartPred = Pred;
           CmpOut = Dst;
         } else {
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index e792b1bce3c5c..812fa85ef3150 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -269,6 +269,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   getActionDefinitionsBuilder(G_ICMP)
       .legalForCartesianProduct({s8}, Is64Bit ? IntTypes64 : IntTypes32)
       .clampScalar(0, s8, s8)
+      .widenScalarToNextPow2(1, /*Min=*/8)
       .clampScalar(1, s8, sMaxScalar);
 
   // bswap
diff --git a/llvm/test/CodeGen/X86/isel-icmp.ll b/llvm/test/CodeGen/X86/isel-icmp.ll
index 8a4d035086112..065d701bab1fd 100644
--- a/llvm/test/CodeGen/X86/isel-icmp.ll
+++ b/llvm/test/CodeGen/X86/isel-icmp.ll
@@ -1,11 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s                               -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s                               -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc < %s                                   -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG-X64
+; Allow fast-isel to fallback to selection dag on x86 for i96 type.
+; RUN: llc < %s -fast-isel                        -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s                                   -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=SDAG-X86
 ; Allow fast-isel to fallback to selection dag on x86
-; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc < %s -fast-isel                        -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=FAST-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X86
 
 define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
 ; SDAG-X64-LABEL: test_icmp_eq_i8:
@@ -720,3 +721,168 @@ define i32 @test_icmp_sle_i32(i32 %a, i32 %b) {
   %res =  zext i1 %r to i32
   ret i32 %res
 }
+
+; PR167326
+define i32 @test_icmp_sge_i96(i96 %a, i96 %b) nounwind {
+; SDAG-X64-LABEL: test_icmp_sge_i96:
+; SDAG-X64:       ## %bb.0:
+; SDAG-X64-NEXT:    movslq %ecx, %rax
+; SDAG-X64-NEXT:    movslq %esi, %rcx
+; SDAG-X64-NEXT:    cmpq %rdx, %rdi
+; SDAG-X64-NEXT:    sbbq %rax, %rcx
+; SDAG-X64-NEXT:    setge %al
+; SDAG-X64-NEXT:    movzbl %al, %eax
+; SDAG-X64-NEXT:    retq
+;
+; FAST-X64-LABEL: test_icmp_sge_i96:
+; FAST-X64:       ## %bb.0:
+; FAST-X64-NEXT:    movslq %ecx, %rax
+; FAST-X64-NEXT:    movslq %esi, %rcx
+; FAST-X64-NEXT:    cmpq %rdx, %rdi
+; FAST-X64-NEXT:    sbbq %rax, %rcx
+; FAST-X64-NEXT:    setge %al
+; FAST-X64-NEXT:    andb $1, %al
+; FAST-X64-NEXT:    movzbl %al, %eax
+; FAST-X64-NEXT:    retq
+;
+; GISEL-X64-LABEL: test_icmp_sge_i96:
+; GISEL-X64:       ## %bb.0:
+; GISEL-X64-NEXT:    movq %rcx, %rax
+; GISEL-X64-NEXT:    movq %rdi, %r8
+; GISEL-X64-NEXT:    movb $32, %cl
+; GISEL-X64-NEXT:    shlq %cl, %r8
+; GISEL-X64-NEXT:    shlq %cl, %rsi
+; GISEL-X64-NEXT:    shrq %cl, %rdi
+; GISEL-X64-NEXT:    orq %rsi, %rdi
+; GISEL-X64-NEXT:    shrq %cl, %r8
+; GISEL-X64-NEXT:    movq %rdi, %rsi
+; GISEL-X64-NEXT:    shlq %cl, %rsi
+; GISEL-X64-NEXT:    orq %r8, %rsi
+; GISEL-X64-NEXT:    sarq %cl, %rdi
+; GISEL-X64-NEXT:    movq %rdx, %rcx
+; GISEL-X64-NEXT:    shlq $32, %rcx
+; GISEL-X64-NEXT:    shlq $32, %rax
+; GISEL-X64-NEXT:    shrq $32, %rdx
+; GISEL-X64-NEXT:    orq %rax, %rdx
+; GISEL-X64-NEXT:    shrq $32, %rcx
+; GISEL-X64-NEXT:    movq %rdx, %rax
+; GISEL-X64-NEXT:    shlq $32, %rax
+; GISEL-X64-NEXT:    orq %rcx, %rax
+; GISEL-X64-NEXT:    sarq $32, %rdx
+; GISEL-X64-NEXT:    xorl %ecx, %ecx
+; GISEL-X64-NEXT:    cmpq %rax, %rsi
+; GISEL-X64-NEXT:    setae %cl
+; GISEL-X64-NEXT:    xorl %eax, %eax
+; GISEL-X64-NEXT:    xorl %esi, %esi
+; GISEL-X64-NEXT:    cmpq %rdx, %rdi
+; GISEL-X64-NEXT:    setge %al
+; GISEL-X64-NEXT:    sete %sil
+; GISEL-X64-NEXT:    testl %esi, %esi
+; GISEL-X64-NEXT:    cmovnew %cx, %ax
+; GISEL-X64-NEXT:    andl $1, %eax
+; GISEL-X64-NEXT:    retq
+;
+; SDAG-X86-LABEL: test_icmp_sge_i96:
+; SDAG-X86:       ## %bb.0:
+; SDAG-X86-NEXT:    pushl %ebx
+; SDAG-X86-NEXT:    pushl %edi
+; SDAG-X86-NEXT:    pushl %esi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT:    movl %eax, %ecx
+; SDAG-X86-NEXT:    sarl $31, %ecx
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; SDAG-X86-NEXT:    movl %edx, %esi
+; SDAG-X86-NEXT:    sarl $31, %esi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; SDAG-X86-NEXT:    cmpl {{[0-9]+}}(%esp), %edi
+; SDAG-X86-NEXT:    sbbl {{[0-9]+}}(%esp), %ebx
+; SDAG-X86-NEXT:    sbbl %eax, %edx
+; SDAG-X86-NEXT:    sbbl %ecx, %esi
+; SDAG-X86-NEXT:    setge %al
+; SDAG-X86-NEXT:    movzbl %al, %eax
+; SDAG-X86-NEXT:    popl %esi
+; SDAG-X86-NEXT:    popl %edi
+; SDAG-X86-NEXT:    popl %ebx
+; SDAG-X86-NEXT:    retl
+;
+; FAST-X86-LABEL: test_icmp_sge_i96:
+; FAST-X86:       ## %bb.0:
+; FAST-X86-NEXT:    pushl %ebx
+; FAST-X86-NEXT:    pushl %edi
+; FAST-X86-NEXT:    pushl %esi
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; FAST-X86-NEXT:    movl %eax, %edi
+; FAST-X86-NEXT:    sarl $31, %edi
+; FAST-X86-NEXT:    movl %edx, %ebx
+; FAST-X86-NEXT:    sarl $31, %ebx
+; FAST-X86-NEXT:    cmpl %ecx, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT:    sbbl {{[0-9]+}}(%esp), %esi
+; FAST-X86-NEXT:    sbbl %eax, %edx
+; FAST-X86-NEXT:    sbbl %edi, %ebx
+; FAST-X86-NEXT:    setge %al
+; FAST-X86-NEXT:    andb $1, %al
+; FAST-X86-NEXT:    movzbl %al, %eax
+; FAST-X86-NEXT:    popl %esi
+; FAST-X86-NEXT:    popl %edi
+; FAST-X86-NEXT:    popl %ebx
+; FAST-X86-NEXT:    retl
+;
+; GISEL-X86-LABEL: test_icmp_sge_i96:
+; GISEL-X86:       ## %bb.0:
+; GISEL-X86-NEXT:    pushl %ebp
+; GISEL-X86-NEXT:    pushl %ebx
+; GISEL-X86-NEXT:    pushl %edi
+; GISEL-X86-NEXT:    pushl %esi
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT:    movl %edx, %eax
+; GISEL-X86-NEXT:    movb $31, %cl
+; GISEL-X86-NEXT:    sarl %cl, %eax
+; GISEL-X86-NEXT:    cmpl %edi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT:    setae %ch
+; GISEL-X86-NEXT:    xorl %ebx, %ebx
+; GISEL-X86-NEXT:    cmpl %ebp, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT:    setae %cl
+; GISEL-X86-NEXT:    sete %bl
+; GISEL-X86-NEXT:    testl %ebx, %ebx
+; GISEL-X86-NEXT:    je LBB13_2
+; GISEL-X86-NEXT:  ## %bb.1:
+; GISEL-X86-NEXT:    movb %ch, %cl
+; GISEL-X86-NEXT:  LBB13_2:
+; GISEL-X86-NEXT:    movl %esi, %edi
+; GISEL-X86-NEXT:    sarl $31, %edi
+; GISEL-X86-NEXT:    xorl %ebx, %ebx
+; GISEL-X86-NEXT:    cmpl %esi, %edx
+; GISEL-X86-NEXT:    setae %dl
+; GISEL-X86-NEXT:    sete %bl
+; GISEL-X86-NEXT:    testl %ebx, %ebx
+; GISEL-X86-NEXT:    je LBB13_4
+; GISEL-X86-NEXT:  ## %bb.3:
+; GISEL-X86-NEXT:    movl %ecx, %edx
+; GISEL-X86-NEXT:  LBB13_4:
+; GISEL-X86-NEXT:    xorl %ecx, %ecx
+; GISEL-X86-NEXT:    cmpl %edi, %eax
+; GISEL-X86-NEXT:    setge %al
+; GISEL-X86-NEXT:    sete %cl
+; GISEL-X86-NEXT:    testl %ecx, %ecx
+; GISEL-X86-NEXT:    je LBB13_6
+; GISEL-X86-NEXT:  ## %bb.5:
+; GISEL-X86-NEXT:    movl %edx, %eax
+; GISEL-X86-NEXT:  LBB13_6:
+; GISEL-X86-NEXT:    movzbl %al, %eax
+; GISEL-X86-NEXT:    andl $1, %eax
+; GISEL-X86-NEXT:    popl %esi
+; GISEL-X86-NEXT:    popl %edi
+; GISEL-X86-NEXT:    popl %ebx
+; GISEL-X86-NEXT:    popl %ebp
+; GISEL-X86-NEXT:    retl
+  %r = icmp sge i96 %a, %b
+  %res = zext i1 %r to i32
+  ret i32 %res
+}

@llvmbot
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llvmbot commented Nov 28, 2025

@llvm/pr-subscribers-backend-x86

Author: Evgenii Kudriashov (e-kud)

Changes

Due to untested branch in #119335

Fixes #167326

Full diff: https://github.com/llvm/llvm-project/pull/169947.diff

3 Files Affected:

  • (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+1-1)
  • (modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+1)
  • (modified) llvm/test/CodeGen/X86/isel-icmp.ll (+172-6)
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 120c38ab8404c..5eb100fb5348b 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -1930,7 +1930,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
         Register CmpOut;
         CmpInst::Predicate PartPred;
 
-        if (I == E - 1 && LHSLeftoverRegs.empty()) {
+        if (I == E - 1) {
           PartPred = Pred;
           CmpOut = Dst;
         } else {
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index e792b1bce3c5c..812fa85ef3150 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -269,6 +269,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   getActionDefinitionsBuilder(G_ICMP)
       .legalForCartesianProduct({s8}, Is64Bit ? IntTypes64 : IntTypes32)
       .clampScalar(0, s8, s8)
+      .widenScalarToNextPow2(1, /*Min=*/8)
       .clampScalar(1, s8, sMaxScalar);
 
   // bswap
diff --git a/llvm/test/CodeGen/X86/isel-icmp.ll b/llvm/test/CodeGen/X86/isel-icmp.ll
index 8a4d035086112..065d701bab1fd 100644
--- a/llvm/test/CodeGen/X86/isel-icmp.ll
+++ b/llvm/test/CodeGen/X86/isel-icmp.ll
@@ -1,11 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s                               -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s                               -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc < %s                                   -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG-X64
+; Allow fast-isel to fallback to selection dag on x86 for i96 type.
+; RUN: llc < %s -fast-isel                        -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc < %s                                   -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=SDAG-X86
 ; Allow fast-isel to fallback to selection dag on x86
-; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc < %s -fast-isel                        -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=FAST-X86
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X86
 
 define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
 ; SDAG-X64-LABEL: test_icmp_eq_i8:
@@ -720,3 +721,168 @@ define i32 @test_icmp_sle_i32(i32 %a, i32 %b) {
   %res =  zext i1 %r to i32
   ret i32 %res
 }
+
+; PR167326
+define i32 @test_icmp_sge_i96(i96 %a, i96 %b) nounwind {
+; SDAG-X64-LABEL: test_icmp_sge_i96:
+; SDAG-X64:       ## %bb.0:
+; SDAG-X64-NEXT:    movslq %ecx, %rax
+; SDAG-X64-NEXT:    movslq %esi, %rcx
+; SDAG-X64-NEXT:    cmpq %rdx, %rdi
+; SDAG-X64-NEXT:    sbbq %rax, %rcx
+; SDAG-X64-NEXT:    setge %al
+; SDAG-X64-NEXT:    movzbl %al, %eax
+; SDAG-X64-NEXT:    retq
+;
+; FAST-X64-LABEL: test_icmp_sge_i96:
+; FAST-X64:       ## %bb.0:
+; FAST-X64-NEXT:    movslq %ecx, %rax
+; FAST-X64-NEXT:    movslq %esi, %rcx
+; FAST-X64-NEXT:    cmpq %rdx, %rdi
+; FAST-X64-NEXT:    sbbq %rax, %rcx
+; FAST-X64-NEXT:    setge %al
+; FAST-X64-NEXT:    andb $1, %al
+; FAST-X64-NEXT:    movzbl %al, %eax
+; FAST-X64-NEXT:    retq
+;
+; GISEL-X64-LABEL: test_icmp_sge_i96:
+; GISEL-X64:       ## %bb.0:
+; GISEL-X64-NEXT:    movq %rcx, %rax
+; GISEL-X64-NEXT:    movq %rdi, %r8
+; GISEL-X64-NEXT:    movb $32, %cl
+; GISEL-X64-NEXT:    shlq %cl, %r8
+; GISEL-X64-NEXT:    shlq %cl, %rsi
+; GISEL-X64-NEXT:    shrq %cl, %rdi
+; GISEL-X64-NEXT:    orq %rsi, %rdi
+; GISEL-X64-NEXT:    shrq %cl, %r8
+; GISEL-X64-NEXT:    movq %rdi, %rsi
+; GISEL-X64-NEXT:    shlq %cl, %rsi
+; GISEL-X64-NEXT:    orq %r8, %rsi
+; GISEL-X64-NEXT:    sarq %cl, %rdi
+; GISEL-X64-NEXT:    movq %rdx, %rcx
+; GISEL-X64-NEXT:    shlq $32, %rcx
+; GISEL-X64-NEXT:    shlq $32, %rax
+; GISEL-X64-NEXT:    shrq $32, %rdx
+; GISEL-X64-NEXT:    orq %rax, %rdx
+; GISEL-X64-NEXT:    shrq $32, %rcx
+; GISEL-X64-NEXT:    movq %rdx, %rax
+; GISEL-X64-NEXT:    shlq $32, %rax
+; GISEL-X64-NEXT:    orq %rcx, %rax
+; GISEL-X64-NEXT:    sarq $32, %rdx
+; GISEL-X64-NEXT:    xorl %ecx, %ecx
+; GISEL-X64-NEXT:    cmpq %rax, %rsi
+; GISEL-X64-NEXT:    setae %cl
+; GISEL-X64-NEXT:    xorl %eax, %eax
+; GISEL-X64-NEXT:    xorl %esi, %esi
+; GISEL-X64-NEXT:    cmpq %rdx, %rdi
+; GISEL-X64-NEXT:    setge %al
+; GISEL-X64-NEXT:    sete %sil
+; GISEL-X64-NEXT:    testl %esi, %esi
+; GISEL-X64-NEXT:    cmovnew %cx, %ax
+; GISEL-X64-NEXT:    andl $1, %eax
+; GISEL-X64-NEXT:    retq
+;
+; SDAG-X86-LABEL: test_icmp_sge_i96:
+; SDAG-X86:       ## %bb.0:
+; SDAG-X86-NEXT:    pushl %ebx
+; SDAG-X86-NEXT:    pushl %edi
+; SDAG-X86-NEXT:    pushl %esi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; SDAG-X86-NEXT:    movl %eax, %ecx
+; SDAG-X86-NEXT:    sarl $31, %ecx
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; SDAG-X86-NEXT:    movl %edx, %esi
+; SDAG-X86-NEXT:    sarl $31, %esi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; SDAG-X86-NEXT:    cmpl {{[0-9]+}}(%esp), %edi
+; SDAG-X86-NEXT:    sbbl {{[0-9]+}}(%esp), %ebx
+; SDAG-X86-NEXT:    sbbl %eax, %edx
+; SDAG-X86-NEXT:    sbbl %ecx, %esi
+; SDAG-X86-NEXT:    setge %al
+; SDAG-X86-NEXT:    movzbl %al, %eax
+; SDAG-X86-NEXT:    popl %esi
+; SDAG-X86-NEXT:    popl %edi
+; SDAG-X86-NEXT:    popl %ebx
+; SDAG-X86-NEXT:    retl
+;
+; FAST-X86-LABEL: test_icmp_sge_i96:
+; FAST-X86:       ## %bb.0:
+; FAST-X86-NEXT:    pushl %ebx
+; FAST-X86-NEXT:    pushl %edi
+; FAST-X86-NEXT:    pushl %esi
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; FAST-X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; FAST-X86-NEXT:    movl %eax, %edi
+; FAST-X86-NEXT:    sarl $31, %edi
+; FAST-X86-NEXT:    movl %edx, %ebx
+; FAST-X86-NEXT:    sarl $31, %ebx
+; FAST-X86-NEXT:    cmpl %ecx, {{[0-9]+}}(%esp)
+; FAST-X86-NEXT:    sbbl {{[0-9]+}}(%esp), %esi
+; FAST-X86-NEXT:    sbbl %eax, %edx
+; FAST-X86-NEXT:    sbbl %edi, %ebx
+; FAST-X86-NEXT:    setge %al
+; FAST-X86-NEXT:    andb $1, %al
+; FAST-X86-NEXT:    movzbl %al, %eax
+; FAST-X86-NEXT:    popl %esi
+; FAST-X86-NEXT:    popl %edi
+; FAST-X86-NEXT:    popl %ebx
+; FAST-X86-NEXT:    retl
+;
+; GISEL-X86-LABEL: test_icmp_sge_i96:
+; GISEL-X86:       ## %bb.0:
+; GISEL-X86-NEXT:    pushl %ebp
+; GISEL-X86-NEXT:    pushl %ebx
+; GISEL-X86-NEXT:    pushl %edi
+; GISEL-X86-NEXT:    pushl %esi
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; GISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; GISEL-X86-NEXT:    movl %edx, %eax
+; GISEL-X86-NEXT:    movb $31, %cl
+; GISEL-X86-NEXT:    sarl %cl, %eax
+; GISEL-X86-NEXT:    cmpl %edi, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT:    setae %ch
+; GISEL-X86-NEXT:    xorl %ebx, %ebx
+; GISEL-X86-NEXT:    cmpl %ebp, {{[0-9]+}}(%esp)
+; GISEL-X86-NEXT:    setae %cl
+; GISEL-X86-NEXT:    sete %bl
+; GISEL-X86-NEXT:    testl %ebx, %ebx
+; GISEL-X86-NEXT:    je LBB13_2
+; GISEL-X86-NEXT:  ## %bb.1:
+; GISEL-X86-NEXT:    movb %ch, %cl
+; GISEL-X86-NEXT:  LBB13_2:
+; GISEL-X86-NEXT:    movl %esi, %edi
+; GISEL-X86-NEXT:    sarl $31, %edi
+; GISEL-X86-NEXT:    xorl %ebx, %ebx
+; GISEL-X86-NEXT:    cmpl %esi, %edx
+; GISEL-X86-NEXT:    setae %dl
+; GISEL-X86-NEXT:    sete %bl
+; GISEL-X86-NEXT:    testl %ebx, %ebx
+; GISEL-X86-NEXT:    je LBB13_4
+; GISEL-X86-NEXT:  ## %bb.3:
+; GISEL-X86-NEXT:    movl %ecx, %edx
+; GISEL-X86-NEXT:  LBB13_4:
+; GISEL-X86-NEXT:    xorl %ecx, %ecx
+; GISEL-X86-NEXT:    cmpl %edi, %eax
+; GISEL-X86-NEXT:    setge %al
+; GISEL-X86-NEXT:    sete %cl
+; GISEL-X86-NEXT:    testl %ecx, %ecx
+; GISEL-X86-NEXT:    je LBB13_6
+; GISEL-X86-NEXT:  ## %bb.5:
+; GISEL-X86-NEXT:    movl %edx, %eax
+; GISEL-X86-NEXT:  LBB13_6:
+; GISEL-X86-NEXT:    movzbl %al, %eax
+; GISEL-X86-NEXT:    andl $1, %eax
+; GISEL-X86-NEXT:    popl %esi
+; GISEL-X86-NEXT:    popl %edi
+; GISEL-X86-NEXT:    popl %ebx
+; GISEL-X86-NEXT:    popl %ebp
+; GISEL-X86-NEXT:    retl
+  %r = icmp sge i96 %a, %b
+  %res = zext i1 %r to i32
+  ret i32 %res
+}

@e-kud
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e-kud commented Nov 28, 2025

Actually, the fix in llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp is only required as it starts reproducing the same situation as on RISCV in #119335 -- we stop hitting the branch with LHSLeftoverRegs. I just figured out that it most likely a copy paste error, as when we traverse LHSLeftoverRegs it makes no sense to test whether it is empty. But then I see legalization issues and once fixed, we stop hitting the LHSLeftoverRegs loop.

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[X86][GlobalISel] clang crashed at -O1/O2/O3

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